Texas Instruments

Description

a clean clock and transmits both clock and data to. DVRs the host FPGA. The LMH0341, LMH0041 and. LMH0071 include a serial reclocked loopthrough with. Nov 28, 2007 Deserializer. HD. 1.485G. 270M. 292M. 259M. LMH0070. Serializer and Driver. SD. 270M. 259M. LMH0071 . Reclocking Deserializer. SD. For the deserializers (LM0341, LMH0041, LMH0051 and LMH0071 ), the LVDS clock and data outputs are skewed to provide maximum setup and hold durations LMH0001. LMH0070. LMH0071 . LMH0074. LMH0026. Comprehensive 3 Gbps SDI Solutions. See the video on SMPTE/SDI jitter reduction at: http://bit.ly/5QKIcF. 2007 11 28 1.485G. 270M. 292M. 259M. LMH0070. . . SD. 270M. 259M. LMH0071 . . . SD. 270M. 259M