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Description
THC63LVD1024 converts the LVDS data streams back into 67bits of CMOS/TTL data with falling edge or ris- ing edge clock for convenient with a variety of LCD. are designed to evaluate THC63LVD1023B/ THC63LVD1024 for. THC63LVD1024 chipset can transmit 67bit data via dual channel LVDS. ck frequency of Oct 15, 2007 THC63LVD1023B/ THC63LVD1024 Application Note. Mode setting, System Diagram and PCB Design Guide. Date. Revision. Contents. THine Electronics, Inc. 2011/04/14 t=1.6mm. Description. THEVA12LVDR1020 Mode Setting & LVDS-Cable. 120mm. GND. THC63LVD1024 . 120mm. +12V. Aug 5, 2013 CMOS/TTL. TQFP100. THC63LVD1024 . 0 to +70. 2. 30. 10 to 135. LVDS. CMOS/ TTL. *EP/LQFP144. Under development. THC63LVD1022.
| Part Number | THC63LVD1024 |
| Main Category | Integrated Circuits (ICs) |
| Sub Category | Interface - Serializers, Deserializers |
| Brand | Texas Instruments |
| Description | IC DESERIALIZER LVDS 144LQFP |
| Series | THine |
| Packaging | Tray |
| Function | Deserializer |
| Data Rate | 945Mbps |
| Input Type | LVDS |
| Output Type | CMOS/TTL |
| Number of Inputs | 10 |
| Number of Outputs | 70 |
| Voltage - Supply | 3 V ~ 3.6 V |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Mounting Type | Surface Mount |
| Package / Case | 144-LQFP Exposed Pad |
| Supplier Device Package | 144-LQFP-EP (20x20) |
| Image |  |
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